The invention relates to methods of forming solder balls on substrates which are electronic components such as semiconductor devices (integrated circuit chips) and interconnection substrates, and to apparatuses for forming the solder balls on the electronic components.
In recent years, flip-chip bonding techniques have increasingly been used to connect (bond) integrated circuit (IC) chips to interconnection substrates and to package substrates. In flip-chip bonding an IC chip component to an interconnection component such as ceramic interconnection substrate, a plurality (e.g., an array) of solder balls (also called xe2x80x9csolder bumpsxe2x80x9d) is formed on a face of a component, typically the IC chip component, and the bumped component is brought into a face-to-face relationship with the other component. The two components are then heated (such as in a furnace) to reflow (heat, then allow to cool) the solder bumps, thereby making electrical connections between respective terminals of the two components.
A need for ever finer pitch arrays of solder balls has accompanied an increase in the circuit density of IC chips and multi-chip modules. For example, an IC chip to be flip-chip connected to an interconnection substrate may require an array of 4 mil (100 m) diameter solder balls disposed at an 8 mil (200 m) pitch.
As used herein, the term xe2x80x9csolder ballxe2x80x9d refers to a substantially spherical or hemispherical mass (bump) of solder (e.g., lead-tin solder) resident on an substrate (e.g., electronic component), suitable for being re-flowed to join the electronic component to another electronic component. A xe2x80x9clarge solder ballxe2x80x9d is a solder ball having a diameter of greater than 20 mils ( greater than 0.020 inches). A xe2x80x9csmall solder ballxe2x80x9d is a solder ball having a diameter of up to 20 mils ( less than =0.20 inches).
The following units of length and their equivalents are used herein:
1 mil=0.001 inches
1 micron (m) 0.000001 meters
25.4 m=1 mil
1 millimeter (mm)=0.001 meters
As used herein, the term xe2x80x9cpitchxe2x80x9d refers to a distance between centers of adjacent solder balls on pads of a substrate. xe2x80x9cCoarse pitchxe2x80x9d refers to a pitch which is at least 50 mils, and connotes a xe2x80x9clow densityxe2x80x9d of solder balls. xe2x80x9cFine pitchxe2x80x9d refers to a pitch which is up to 20 mils, and connotes a xe2x80x9chigh densityxe2x80x9d of solder balls.
For example, a typical xe2x80x9cBGAxe2x80x9d substrate has 30 mil diameter solder balls disposed at a 50 mil (coarse) pitch. A typical xe2x80x9cBGAxe2x80x9d (microBGA) substrate has 15-20 mil diameter solder balls disposed at a 30 mil (xe2x80x9cmediumxe2x80x9d) pitch. A typical xe2x80x9cflip chipxe2x80x9d substrate has 4-5 mil diameter solder balls disposed at an 8-10 mil pitch.
As used herein, the term xe2x80x9celectronic componentxe2x80x9d includes any circuitized substrate, typically having xe2x80x9cpadsxe2x80x9d, including but not limited to integrated circuit (IC) chips (including prior to or after singulation from a semiconductor wafer), printed circuit boards, polyimide interconnection elements, ceramic substrates, and the like.
As used herein, a xe2x80x9csubstratexe2x80x9d is an electronic component having a nominally flat surface upon which it is desirable to form solder balls to effect electrical connections to another electronic component. xe2x80x9cWafer substratesxe2x80x9d are substrates (or electronic components) which are semiconductor (crystalline, typically silicon) wafers. Any substrate which is not a wafer substrate is an xe2x80x9cother substratexe2x80x9d. Ball grid array (BGA) substrates are other substrates.
As used herein, the terms xe2x80x9csubstrate bumpingxe2x80x9d and xe2x80x9cball bumpingxe2x80x9d refer to a process for forming solder balls on substrates. As used herein, xe2x80x9cbumping machinesxe2x80x9d comprise equipment adapted to perform substrate bumping.
A number of techniques are known for ball bumping electronic components, some of which are not well suited to fine pitch ball bumping.
In an evaporation technique, solder is evaporated through a metal mask in an evacuated chamber. This requires a high investment in capital equipment and has high cost associated with cleaning the processing equipment and with replacing the metal mask on a frequent basis. Thermal mismatch between the evaporation mask and the substrate being ball bumped tends to limit the usefulness of the technique to moderate densities and moderate solder bump sizes.
Electroplating techniques have been used to achieve higher densities and smaller bump sizes. In this technique, the substrate surface is covered with an electroplating seed layer, then masked with photoresist which is patterned and developed to form an electroplating mold over each substrate pad. The seed layer is then electroplated, filling the molds, and the photoresist and vestigial seed layer are thereafter stripped (etched away), leaving behind the plated bumps. This technique is time consuming, requires high capital expenditure, and involves hazardous chemicals.
In the stenciling technique, a stencil having apertures therein is placed over the substrate with the apertures overlying corresponding pads of the substrate. As the stencil is held in place, an amount of solder paste is dispensed onto the stencil, and a screening blade (sometimes called a xe2x80x9cdoctor bladexe2x80x9d) is moved across the stencil surface in a manner to force solder paste into the stencil apertures. The stencil is then removed, which leaves behind bodies of solder paste on the pads, and the bodies are thereafter reflowed to form solder bumps on the substrate. This technique is relatively inexpensive, and comprises only a few quick steps, but is generally not well suited to small bump sizes and high bump densities.
Conventional solder paste typically contains tiny particles of solder material (lead/tin), in a matrix of flux, and comprises about 30% (by volume) solid material.
U.S. Pat. No. 5,539,153 (xe2x80x9cHewlett Packardxe2x80x9d), incorporated in its entirety by reference herein, discloses a method of bumping substrates by contained paste deposition. A non-wettable metal mask (stencil) is disposed on a substrate such that a plurality of apertures in the mask align with a plurality of pads on the substrate. The apertures are filled with solder paste in a manner comparable to that which was described hereinabove with respect to the stenciling technique. The solder paste is then reflowed with the mask in place. After reflow, the mask is removed.
U.S. Pat. No. 5.492.266 (xe2x80x9cIBM-1xe2x80x9d), incorporated in its entirety by reference herein, discloses a process for forming solder on select contacts of a printed circuit board (PCB), and is generally similar to the aforementioned Hewlett Packard Patent. A non-wettable stencil having openings is positioned on the board, the openings are filled with solder paste and, with the stencil fixedly positioned on the board, the solder paste retained by the stencil pattern is reflowed to selectively form on the underlying contacts of the printed circuit board.
U.S. Pat. No. 5,658,827 (xe2x80x9cIBM-2xe2x80x9d), incorporated in its entirety by reference herein, discloses a method for forming solder balls on a substrate. The solder balls are formed by squeegeeing solder paste through apertures in a fixture into contact with pads on a substrate, and heating the fixture, paste and substrate to reflow the solder paste into solder balls that attach to the pads and are detached from the fixture. After cooling, the fixture is separated from the substrate. In an embodiment of the method, the fixture and substrate are inverted, and another surface mount electrical component is placed on the opposite surface of the substrate prior to heating the substrate.
The aforementioned Hewlett Packard, IBM-1 and IBM-2 patents all describe printing solder paste through a mask or stencil onto a substrate, and reflowing the solder paste with the stencil in place on the substrate. In each case, the cells formed by the stencil apertures/openings are open on one side (the side of the stencil opposite the side in contact with the substrate). No admission is made herein that the inverted technique described in the IBM-2 patent would actually work as described.
The aforementioned xe2x80x9cparentxe2x80x9d U.S. patent application Ser. No. 08/863,800 filed May 27, 1997, discloses CAPTURED-CELL SOLDER PRINTING AND REFLOW METHODS AND APPARATUSES. Generally, a screening stencil is laid over the surface of the substrate and solder paste material is deposited into the stencil""s apertures with a screening blade. The stencil is placed in such a manner that each of its apertures is positioned over a substrate pad upon which a solder bump is to be formed. Next, a flat pressure plate is laid over the exposed top surface of the stencil, which creates a fully enclosed (or xe2x80x9ccapturedxe2x80x9d) cell of solder material within each stencil aperture. Then, with the stencil and plate remaining in place on top of the substrate, the substrate is heated to a temperature sufficient to reflow the solder material. After reflow, the substrate is cooled, and the pressure plate and stencil are thereafter removed, leaving solder bumps on the substrate pads. The use of the pressure plate ensures proper formation of the solder bumps at high densities of solder bumps (i.e., high densities corresponding to small solder bump sizes and small pitch distances between solder bumps).
An example of a substrate having solder balls on a surface thereof is the Ball Grid Array (BGA) package. The advent and popularity of the BGA package has brought with it several new package manufacturing and assembly problems. One of the more significant problems is finding an efficient, cost-effective technique for applying the solder balls to the package surface. The package surface is usually formed from an electrically insulating material (e.g., printed circuit board material) with a pattern of metalized pads disposed thereupon within the package. Several methods are currently used to form solder balls on these package pads.
One method of forming solder balls on package pads involves the application of solder flux to the package pads, then placing preformed solder balls onto the package pads, either individually or en masse, with the aid of a fixture or a xe2x80x9cpick-and-placexe2x80x9d apparatus similar to those used for circuit board assembly. The package is then heated to the melting point of the solder ball alloy which will then wet the metallic surface of the pads and join thereto. This pick-and-place method required the precision handling of massive qualities of solder balls. As the connection counts of package increase, hundreds or even thousands of balls must be manipulated in this fashion for each package.
An alternative method of disposing solder balls on package pads involves using a printing or dispensing fixture to apply measured quantities of solder paste (a mixture of fine solder particles in a flux-containing medium) to the package contact pads. Upon exposure to heat, the solder melts and surface tension causes the solder to assume a generally spherical shape. Once cooled, the spherical shapes form ball bumps (solder balls) on the package. Evidently, solder ball contacts formed in this manner, being generally spherical, will exhibit a 1:1 aspect ratio of height-to-width. Even if hemispherical, the solder ball contacts will have a height:width ratio on the order of 0.5:1. In certain applications, it would be desirable that the external package contacts have a height:width ratio in excess of 1:1 (e.g., 2:1).
Another technique for disposing solder balls on package pads involves using printed solder paste, then placing a preformed ball, which is essentially a combination of the two techniques described hereinabove. In this technique, solder is printed onto the contact pads to form an xe2x80x9cadhesivexe2x80x9d on the contact pad, then a preformed solder ball is placed onto the contact pad and the package is heated to reflow the solder paste, thereby joining the pre-formed solder balls to the pads.
Difficulties with any technique involving measuring or dispensing precise quantities of solder paste on pads to form ball bumps include dealing with the rheological characteristics (elasticity, viscosity, plasticity) of the solder paste, accurately controlling the volume of solder paste after dispensing and reflow, and the shape of the final ball bump. The shape of the ball bump can be affected by such factors as surface tension of the molten solder and the amount of wettable expose metal area of the contact pad.
The generally spherical shape assumed by solder balls formed as described hereinabove inherently prevents the formation of xe2x80x9ctallxe2x80x9d (high aspect ratio) ball bumps by ordinary means. This is a limiting characteristic because, in certain applications, tall solder bumps can be used to great advantage in reflow assembly (e.g., of a packaged semiconductor device to a printed circuit board). As mentioned above, in general it is difficult to form contacts with height-to-width ratios (aspect ratios) of greater than 1:1. Some techniques involving xe2x80x9cbuilding upxe2x80x9d of solder contact height in a series of process steps have managed to produce tall (high aspect ratio) contacts, but such techniques are typically expensive and cumbersome in high-volume production.
Consistency in the height of solder ball contacts is another critical factor for successful assembly of BGA type packages to circuit boards. If one or more of the solder balls are significantly shorter than others (usually due to an insufficient amount of solder paste deposited on one or more conductive pads prior to contact formation) it becomes highly likely that these smaller (shorter) contacts will completely miss their mating contact pads (on the circuit board) and will fail to form an electrical connection between the packaged semiconductor device and the underlying substrate (e.g., printed circuit board). Hence, quality control for BGA packages is critical, since proper electrical connections between the BGA package and the substrate to which it is assembled are formed only if each and every one of the solder ball contacts reflows correctly and wets its associated conductive pad on the substrate. Defective assemblies of packages to interconnection substrates can be difficult or impossible to repair after assembly if connections are not properly formed. Even prior to assembly, the correction of improperly formed solder balls on the exterior of a package can be very difficult and involves, initially, careful quality control inspection of the ball bumps prior to assembly of the packaged device to a substrate.
As the volume of packages produced by the aforementioned methods increases, the complexity of the manufacturing processes becomes an obstacle to high manufacturing rates. In order to avoid high scrap rates, high machine accuracy must be maintained, raw material properties (e.g., solder paste and pad metal) must be carefully controlled, and numerous process parameters (e.g., amount of solder paste dispensed, size of conductive pads, temperature, shape and size of ball contact) must be monitored.
Further complicating matters, in order to accommodate different package configurations (e.g., different size packages, different array spacing of the ball bump contacts, etc.), it may be necessary to change numerous parts of the manufacturing equipment (tooling). Generally speaking, complicated setup and tooling changes tend to increase downtime, thereby increasing production cost.
The following U.S. patents are cited as being of particular interest, and are incorporated in their entirety by reference herein.
It is an object of the invention to provide an improved process for forming solder balls on electronic components.
It is another object of the present invention to provide a technique for ball-bumping a substrate so that the resulting solder balls have a clean, oxide-free surface, thereby improving wetting when the ball-bumped substrate is joined (soldered) to an interconnection substrate.
It is another object of the present invention to accomplish the foregoing objects in a minimum number of process steps.
It is another object of the present invention to accomplish the foregoing objects in a process which requires a minimal amount of manufacturing time.
It is another object of the present invention to provide a technique for accomplishing the foregoing objects inexpensively.
It is another object of the present invention to provide a technique for accomplishing the foregoing objects in a manner suited to high-volume production.
According to the invention, an electronic component substrate is processed (xe2x80x9cball bumpedxe2x80x9d) to form a plurality of solder balls on a corresponding plurality of pads on the substrate. A mask (stencil) having a plurality of openings (cells) is disposed on the surface of the a heater stage and is printed (filled with solder paste). Then, the assembly of mask and heater stage is shuttled over to a substrate having pads (e.g., a wafer) which is in a chuck. The filled openings of the mask are aligned over the corresponding plurality of pads on the substrate.
The mask is held in intimate contact with the heater stage and with the wafer. The cells are therefore xe2x80x9cclosedxe2x80x9d or captured. Then the heater stage is heated to reflow the solder paste and form solder balls. The mask may be removed from the wafer (or vice versa) while still molten.
Reflow may also be performed in a partially-inverted orientation.
The process of the present invention is capable of achieving high densities of small solder balls, and is readily scalable to lower densities of large solder balls. The process proceeds relatively quickly, with low capital expenditure equipment, and without hazardous chemicals.
The present invention provides a fast, low-cost, robust, non-capital-intensive method and apparatus for forming arrays of solder bumps at moderate to high densities on electronic components, including 150 marea arrays, 200 marea arrays, and 250 marea arrays, forming solder balls at 0.5 mm pitch and at 0.8 mm pitch.
Other objects, features and advantages of the invention will become apparent in light of the following description thereof.